Fabricating semiconductor devices such as logic and memory devices typically includes processing a substrate such as a semiconductor wafer using a large number of semiconductor fabrication processes to form various features and multiple levels of the semiconductor devices. For example, lithography is a semiconductor fabrication process that involves transferring a pattern from a reticle to a resist arranged on a semiconductor wafer. Additional examples of semiconductor fabrication processes include, but are not limited to, chemical-mechanical polishing (CMP), etching, deposition, and ion implantation. Multiple semiconductor devices may be fabricated in an arrangement on a single semiconductor wafer and then separated into individual semiconductor devices.
As used throughout the present disclosure, the term “wafer” generally refers to substrates formed of a semiconductor or non-semiconductor material. For example, a semiconductor or non-semiconductor material may include, but are not limited to, monocrystalline silicon, gallium arsenide, and indium phosphide. A wafer may include one or more layers or films. For example, such layers may include, but are not limited to, a resist, a dielectric material, a conductive material, and a semiconductive material. Many different types of such layers are known in the art, and the term wafer as used herein is intended to encompass a wafer on which all types of such layers or films may be formed. Many different types of devices may be formed on a wafer, and the term wafer as used herein is intended to encompass a wafer on which any type of device known in the art may be fabricated.
Generally, certain requirements are established for the flatness and thickness uniformity of wafers. However, the various process steps applied to a wafer required during device fabrication as well as thickness variations may result in elastic deformation of the wafer. These elastic deformations may cause significant distortions. Such distortions may include in-plane distortions (IPD) and/or out-plane distortions (OPD). Distortions may lead to errors in downstream applications such as overlay errors in lithographic patterning or the like. Therefore, providing the ability to predict/estimate process-induced distortions is a vital part of semiconductor manufacturing process. As such, it would be advantageous to provide a system and method that provides improved wafer distortion capabilities.